XCENA Raises $135M Series B for AI Memory Controller That Combines 2TB DRAM with Thousands of CPU Cores

Quick Facts

• XCENA raised $135 million Series B at $570 million valuation, bringing total funding to $185 million
• The MX1 chip combines up to 2TB of DRAM with thousands of RISC-V CPU cores to handle AI inference workloads
• Mass production begins end of 2026 using Samsung’s 4nm process, with revenue expected in 2027

XCENA, a South Korean computational memory startup, has closed a $135 million Series B round to commercialize its MX1 chip designed to address AI inference memory bottlenecks. The funding brings the company’s valuation to $570 million.

Atinum Investment and IMM Investment co-led the round, with participation from more than half a dozen Asian institutional investors. XCENA has now raised $185 million total since its 2022 founding.

The company was founded by former Samsung Electronics and SK Hynix executives. CEO Jin Kim previously served as Corporate VP at SK Hynix, where he was one of the youngest VPs in company history. CTO Dohun Kim and CPO Harry Juhyun Kim also came from Samsung and SK Hynix.

XCENA’s MX1 chip addresses what the company calls a fundamental shift in AI infrastructure. “Inference isn’t just a compute problem; it’s increasingly a memory scaling problem,” Kim said. The device combines up to two terabytes of DRAM with several thousand CPU cores built on the open-source RISC-V architecture.

The cores handle data orchestration tasks that typically run on CPUs, including preprocessing and KV cache management for large language models. “While GPUs excel at matrix multiplication, much of the surrounding data orchestration still runs on CPUs. Our chip handles those tasks directly within the memory module itself,” Kim explained.

Built on the Compute Express Link 3.x standard, the MX1 can hold LLM KV caches and vector databases without traditional memory performance issues. XCENA claims customers could potentially run workloads that previously required 10 servers on just one system.

The company plans mass production using Samsung’s four-nanometer manufacturing process by the end of 2026, with revenue generation expected in 2027. XCENA currently has more than 90 employees across offices in Pangyo, South Korea and Sunnyvale, California.

XCENA competes with Nasdaq-listed companies Astera Labs and Marvell in next-generation memory connectivity. The company differentiates itself through vertical integration, designing its own internal memory hierarchy, interconnect bus, and DRAM controller.

The funding will support global expansion and customer deployment scaling. XCENA targets hyperscalers spending billions on AI infrastructure, where small memory efficiency gains translate to hundreds of millions in potential savings.

“XCENA is redefining how computational memory is applied in real-world systems,” said Sangmin Lim, Investment Director at Atinum Investment. “Their MX1 product is already showing how customers can simplify complex infrastructure and eliminate inefficiencies.”

Read more: XCENA raises $135M for its computational memory controller