Huawei Unveils LogicFolding Chip Architecture to Challenge Moore’s Law

Quick Facts

• Huawei introduced LogicFolding architecture and Tau Scaling Law at IEEE symposium, targeting 1.4-nanometer chips by 2031
• Chinese semiconductor stocks surged up to 20% following the announcement, with SMIC jumping 19%
• Company claims 55% reduction in transistor density and 41% increase in power efficiency over traditional designs

Huawei unveiled a new chip architecture on May 25 that the company claims will replace Moore’s Law as the guiding principle for semiconductor development. He Tingbo, chairman of Huawei’s HiSilicon Semiconductor division, introduced the LogicFolding architecture and Tau Scaling Law at the IEEE International Symposium on Circuits and Systems in Shanghai.

The LogicFolding architecture physically folds and stacks logic circuits onto a dual-layer framework. This design breaks down traditional circuit layout boundaries, shortening critical-path wiring and reducing signal propagation delays. Huawei claims the approach delivers a 55% reduction in transistor density and 41% increase in power efficiency compared to conventional designs.

“This year we have prepared a surprise for the whole industry. Not saturation, not continuation, but a big leap ahead,” He said during the presentation.

The Tau Scaling Law prioritizes signal speed over transistor size, marking a departure from Moore’s Law’s focus on geometric scaling. Industry experts have nicknamed the approach “Her’s Law” in recognition of He Tingbo’s contribution to semiconductor theory.

Markets responded immediately to the announcement. Semiconductor Manufacturing International Co. shares jumped more than 19%, while Hua Hong Semiconductor surged by the daily limit of 20%. The Star 50 Index in Shanghai reached a record high.

Huawei plans to debut LogicFolding in flagship Kirin smartphone processors this autumn. The company aims to scale the architecture to Ascend AI processors and data center clusters by 2030. By 2031, Huawei projects it can design chips with transistor density equivalent to a 1.4-nanometer process.

The development comes as Huawei operates under US sanctions that restrict access to advanced semiconductor manufacturing equipment. The company has designed and mass-produced 381 chips using the Tau Scaling Law over six years, according to He.

“What Huawei is proposing is a shift from traditional node-driven scaling to system-level efficiency scaling,” said He Hui, director of semiconductor research at Omdia. “Rather than depending solely on smaller transistors, the company is focusing on shortening interconnect, lowering latency and improving data movement inside the chip.”

Analysts remain cautious about implementation challenges. “Cost, power, heat, and system integration remain major challenges, especially for Cloud AI servers,” said Brady Wang, associate director at Counterpoint Research. A five-year gap still exists between TSMC’s capabilities and what Huawei can produce with manufacturing partner SMIC.

The announcement represents China’s most significant semiconductor breakthrough since Huawei’s 2023 comeback with 5G-capable Mate 60 smartphones using 7-nanometer technology. Industry observers view the development as both a technical innovation and strategic response to geopolitical constraints on China’s semiconductor industry.

Read more: China’s Huawei unveils new sanctions-busting chip architecture that replaces Moore’s Law